CHAPTER 17 FLASH MEMORY
[Bit 1] WE (Write Enable)
This bit controls the writing of data and commands to flash memory in CPU mode.
When this bit is "0", data and commands cannot be written to flash memory. In addition, data can be
read from flash memory at faster speeds (32-bit, 16-bit, and 8-bit access are enabled).
When this bit is "1", data and commands can be written to flash memory and the automatic algorithm
can be activated. However, data is read from flash memory at slower speeds (only 16-bit and 8-bit
access are enabled).
If this bit is rewritten, confirm that the RDY bit has stopped the automatic algorithm (write/erase).
When the RDY bit is set to "0," the value of this bit cannot be changed.
Writing is enabled regardless of this bit in FLASH mode.
This bit is initialized to "0" during reset.
Read and write operations are enabled.
If the WE bit of the FLCR register is changed, be sure to dummy-read the FLCR register immediately
after the WE bit is changed. Operation will be unpredictable if a dummy read is not performed.
The register numbers are arbitrary.
[Bit 0] Reserved: Reserved bit
Always set this bit to "0."
Writing to flash memory is disabled and data is read from flash
memory in 32-bit access mode.
Writing to flash memory is enabled and data is read from flash
memory in 16-bit access mode.