■ Hold Request Cancellation Request (HRLC: Hold Request Cancel Request)
For an interrupt with a higher priority to be processed during CPU hold, the device that has generated the
hold request must cancel the request. Set in the HRCL register the interrupt level to be used as the criterion
of generating a cancellation request.
If an interrupt source with a higher interrupt level than the level defined in the HRCL register occurs, a
hold request cancellation request is generated.
If the interrupt level of the HRCL register is greater than the interrupt level after a priority decision, a
cancellation request occurs.
If the interrupt level of the HRCL register is equal to or less than the interrupt level after a priority
decision, no cancellation request occurs.
Because the cancellation request remains valid, no DMA transfer occurs unless the interrupt source that has
caused the cancellation request is cleared. Be sure to clear the corresponding interrupt source.
If an NMI is used, the cancellation request is valid because the MHALTI bit of the HRCL register is set to
Values that can be set in the HRCL register range from 10000
If this register is set to 11111
Table 9.3-2 shows the settings of interrupt levels at which a hold request cancellation request occurs.
Table 9.3-2 Settings of Interrupt Levels at which Hold Request Cancellation Request
After a reset, since DMA transfer is not allowed at any interrupt level, no DMA transfer is performed if an
interrupt has occurred. Be sure to set the HRCL register to the necessary value.
, an interrupt request is issued for all the interrupt levels. If this register is set
, an interrupt request is issued only for an NMI.
Interrupt levels at which a cancellation request occurs
NMI and Interrupt level 16
NMI and Interrupt levels 16 to 17
NMI and Interrupt levels 16 to 30 [initial value]
, which is the same range as for