Setting The Oscillation Stabilization Time - Fujitsu F2MC-16LX Hardware Manual

5.6

Setting the Oscillation Stabilization Time

Use the WS1 and WS0 bits in the CKSCR register to select the oscillation stabilization
time required when the stop or hardware standby mode is released. Select the
oscillation stabilization time according to the types and characteristics of the
oscillator and the oscillation element connected to the X0 and X1 pins.
■ Setting the Oscillation Stabilization Time
Resets other than a power-on reset do not initialize these bits. These bits are initialized to "11"
when a power-on reset occurs. For this reason, the oscillation stabilization time at power-on is
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about 2
The oscillation stabilization time for the PLL clock is fixed to 2
OSC oscillation frequency is 4 MHz, the oscillation stabilization time is about 2 ms.)
OSC oscillation cycles.
5.6 Setting the Oscillation Stabilization Time
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main clock cycles. (When the
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