Fujitsu FR60 Hardware Manual page 652

INDEX
Note
Note for the Case of Using No Subclock............... 33
Note on Operating in PLL Clock Mode ................ 33
Note on Specifying Two or More Sectors ........... 562
Note on Using an External Clock ......................... 32
Notes of PS Register........................................... 35
Notes on DMA Transfer in Sleep Mode.............. 515
Notes on Setting Registers................................. 475
Notes on Writing Data ...................................... 559
O
OCCP
Compare Register (OCCP0 to OCCP7) .............. 434
Occurrence
Occurrence of an Address Error......................... 513
Occurrence of Interrupts and Timing for Setting
Flags .................................................. 402
OCS
Output Control Register (OCS0 to OCS7)........... 434
One Prefetch Access Operation
Unit for One Prefetch Access Operation ............. 219
Open Pin
Handling of NC and Open Pins............................ 33
Operating Mode
Operating Modes of the UART .......................... 399
Overview of Operating Modes............................. 90
Serial I/O Interface Operating Modes ................. 411
Operating Procedure
Operating Procedure for an External Interrupt
.......................................................... 348
Operating State
Operating States of the Counter ......................... 295
Operation
16-bit Input Capture Operation .......................... 430
Enabling Operation for All Channels.................. 508
Examples of Operation (Simple Waveforms) ...... 529
Limitations on Operation with Delay Slot ............. 69
Logical Operation and Bit Manipulation ............... 54
Operation Flowchart for Block Transfer ............. 522
Operation Initialization Reset (RST) .................... 95
Operation Initialization Reset (RST) Clear
Sequence .............................................. 98
Operation of an External Interrupt...................... 348
Operation of Clock Supply Function .......... 147, 153
Operation of INT Instruction ............................... 87
Operation of INTE Instruction ............................. 87
Operation of Interval Timer Function ......... 146, 152
Operation of RETI Instruction ............................. 89
Operation of Step Trace Trap .............................. 88
Operation of the 16-bit Output Compare
Module............................................... 437
Operation of the Data Internal RAM/
Instruction Internal RAM Access Restriction
Functions............................................ 579
634
Operation of the Main Clock Oscillation Stabilization
Wait Timer......................................... 153
Operation of the Watch Timer ........................... 148
Operation of Undefined Instruction Exception ...... 88
Operation of User Interrupt/NMI ......................... 86
Operation with Delay Slot................................... 68
Operation without Delay Slot .............................. 71
Overview of DMA External Interface
Operation ........................................... 529
Overview of Serial I/O Interface (SIO)
Operation ........................................... 419
PLL Operation Enable ...................................... 105
Reload Operation ............................................. 501
Transfer Count Registers and Reload Operation
......................................................... 505
Unit for One Prefetch Access Operation............. 219
Operation Flowchart
Operation Flowchart for Block Transfer ............. 522
Operation Flowchart for Burst Transfer.............. 523
Operation Flowchart for Demand Transfer ......... 524
Optional Clear
Optional Clear and Temporary Stopping of a Prefetch
Access ............................................... 219
Ordering
Bit Ordering ...................................................... 64
Byte Ordering.................................................... 64
Overview of Byte Ordering............................... 188
OSCCR
Oscillation Control Register (OSCCR)............... 128
Oscillation Control Register
Oscillation Control Register (OSCCR)............... 128
Oscillation Stabilization Wait
Selecting an Oscillation Stabilization Wait
Time .................................................. 100
Sources of an Oscillation Stabilization Wait ......... 99
Other Feature
Other Features ..................................................... 5
Other Function
Other Functions ............................................... 491
Other Interval Timer
Other Interval Timers and Counters ....................... 4
Other Item
Other Items ..................................................... 467
Other Type
Other Types of Instructions................................. 54
Outline
Outline of Flash Memory.................................. 534
Output Compare
Features of the Output Compare Module ............ 432
Overview of the Output Compare Module .......... 431
Output Compare Module
Block Diagram of the Output Compare Module
......................................................... 433