Fujitsu FR60 Hardware Manual page 227

■ External Wait Timing (TYP[3:0]=0001
Figure 4.5-5 shows the external wait timing.
MCLK
A[23:0]
AS
CSn
RD
D[31:16]
WRn
D[31:16]
RDY
• Setting "1" for the TYP0 bit of the ACR register and enabling the external RDY input pin enables
external wait cycles to be inserted. In the figure above, because waiting using the auto-wait cycle is
enabled, the section of the RDY pin indicated by hatching is disabled. The value of the RDY input pin
is decided following the last cycle of the auto-wait cycle. Also, after a wait cycle is completed, the
value of the RDY input pin is disabled until the next access cycle starts.
,AWR=2008
B
Figure 4.5-5 External Wait Timing
Basic cycle 2 auto-wait cycles Wait cycle by RDY
)
H
Release
Wait
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