This section describes the temporary stopping of DMA transfer.
■ Setting of Temporary Stopping by Writing to the Control Register (Set Independently
for Each Channel or all Channels Simultaneously)
If temporary stopping is set using the temporary stop bit, transfer on the corresponding channel is stopped
until release of temporary stopping is set again. You can check the DSS bits for temporary stopping.
Transfer is restarted when temporary stopping is canceled.
■ NMI/Hold Suppress Level Interrupt Processing
If an NMI request or an interrupt request with a higher level than the hold suppress level occurs, all
channels on which transfer is in progress are stopped at the boundary of the transfer unit and the bus right is
released to give priority to NMI/interrupt processing. Transfer interrupts accepted during NMI/interrupt
processing are retained, initiating a wait for completion of NMI processing.
Channels for which requests are retained restart transfer after NMI/interrupt processing is completed.