Fujitsu FR60 Hardware Manual page 608

APPENDIX
Table A-1 I/O Map (8 / 10)
Address
+0
000644
H
000648
H
00064C
H
000650
H
000654
H
000658
H
00065C
H
000660
H
000664
H
XXXXXXXXXXXXXXXX
000668
H
XXXXXXXXXXXXXXXX
00066C
H
XXXXXXXXXXXXXXXX
000670
H
000674
H
IOWR0[R/W]B,H,W
000678
H
XXXXXXXX
00067C
H
CSER[R/W]B,H,W
000680
H
000000001
000684
H
to
0007F8
H
0007FC
________
H
000800
H
to
000AFC
H
*5: This register is accessed by mode vector fetch. It can not be accessed during normal operation.
590
+1
ASR1[R/W]H,W
0000000000000000
ASR2[R/W]H,W
0000000000000000
ASR3[R/W]H,W
0000000000000000
ASR4[R/W]H,W
0000000000000000
ASR5[R/W]H,W
0000000000000000
ASR6[R/W]H,W
0000000000000000
ASR7[R/W]H,W
0000000000000000
AWR0[R/W]B,H,W
0111111111111111
AWR2[R/W]B,H,W
AWR4[R/W]B,H,W
AWR6[R/W]B,H,W
IOWR1[R/W]B,H,W
XXXXXXXX
________
*5
MODR[W]
XXXXXXXX
Register
+2
ACR1[R/W]B,H,W
XXXXXXXXXXXXXXXX
ACR2[R/W]B,H,W
XXXXXXXXXXXXXXXX
ACR3[R/W]B,H,W
XXXXXXXXXXXXXXXX
ACR4[R/W]B,H,W
XXXXXXXXXXXXXXXX
ACR5[R/W]B,H,W
XXXXXXXXXXXXXXXX
ACR6[R/W]B,H,W
XXXXXXXXXXXXXXXX
ACR7[R/W]B,H,W
XXXXXXXXXXXXXXXX
AWR1[R/W]B,H,W
XXXXXXXXXXXXXXXX
AWR3[R/W]B,H,W
XXXXXXXXXXXXXXXX
AWR5[R/W]B,H,W
XXXXXXXXXXXXXXXX
AWR7[R/W]B,H,W
XXXXXXXXXXXXXXXX
________
________
IOWR2[R/W]B,H,W
XXXXXXXX
________
________
________
________
________
Block
+3
T-unit
________
TCR[W]B,H,W
00000000
Reserved
________
Reserved