4.4.4
External Access
This section describes the relationship between the internal register and external data
bus based on the byte ordering (endian method) and the bus width.
■ Word Access
External access using word access is shown below:
16-bit bus
width
D31
D00
8-bit bus
width
Internal
D31
D00
Big endian mode
Internal
External
Reg
terminal
address: "0" "2"
D31
AA
AA CC
BB
BB DD
D16
CC
DD
(1)
(2)
External
Reg
terminal
address:
"0" "1" "2" "3"
D31
AA
AA BB CC DD
D24
BB
CC
DD
(1) (2) (3) (4)
Control
Internal
terminal
Reg
D31
WR0
WR1
D00
Internal
Control
Reg
terminal
address:
D31
WR0
AA
BB
CC
DD
D00
Little endian mode
External
terminal
address: "0" "2"
D31
AA
DD BB
BB
CC AA
D16
D1 6
CC
DD
(1)
(2)
External
terminal
"0" "1" "2" "3"
D31
DD CC BB
AA
D24
(1) (2) (3) (4)
Control
terminal
WR0
WR1
Control
terminal
WR0
201