Table 2-3 Selection Of Oscillation Stabilization Time - Fujitsu F2MC-8L Family series Hardware Manual

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CPU
stabilization time
HARDWARE CONFIGURATION
b. STOP mode
• Switching to STOP mode
- Writing 1 at the STP (bit 7) of the STBC register switches the mode to
STOP mode.
- The STOP mode stops clock oscillation and the CPU and all
peripherals stop.
- The input/output pins and output pins in the STOP mode can be
controlled by the SPL (bit 5) of the STBC register so that they are held
in the state immediately before entering the STOP mode, or so that
they enter in the high-impedance state.
- If an interrupt is requested when 1 is written at the STP (bit 7),
instruction execution continues without switching to the STOP mode.
- In the STOP mode, the contents of registers and RAM immediately
before entering the STOP mode are held.
• Canceling STOP mode
- The STOP mode is canceled either by inputting the reset signal or by
requesting an interrupt.
- When the reset signal is input during the STOP mode, the CPU is
switched to the reset state and the STOP mode is canceled.
- When an interrupt higher than level 11 is requested from the external
interrupt circuit during the STOP mode, the STOP mode is canceled.
- When the I flag and IL bit are enabled after canceling, the CPU
executes the interrupt processing like an ordinary interrupt. When they
are disabled, the CPU starts processing the next instruction given
before entering the STOP mode.
- The oscillation stabilization time can be selected from the two types
in Table 2–3 as options.
- If the STOP mode is canceled by inputting the reset signal, the CPU
is switched to the oscillation stabilization state. Therefore, the reset
sequence is not executed unless the oscillation stabilization time is
elapsed. The oscillation stabilization time corresponds to the
optionally selected oscillation stabilization time of the main clock.
However, when Power-on reset unavailable is selected by the mask
option, the CPU is not switched to the oscillation stabilization state
even if the STOP mode is canceled by inputting the reset signal.
Table 2–3 Selection of Oscillation Stabilization Time
Oscillation
Oscillation stabilization
18
About 2
/f
CH
14
About 2
/f
CH
2– 12
time at 5 MHz
About 52.4 ms
About 3.28 ms
Remarks
For crystal oscillator
For crystal oscillator

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