Fujitsu FR60 Hardware Manual page 266

CHAPTER 6 8/16-bit Up/Down Counters/Timer and U-Timers
Compare and reload function (compare interrupt request output, counter clearing, underflow interrupt
request output, and reloading)
Compare and reload disabled
• With the count direction flag, the counting direction immediately before the current count can be
identified.
• The generation of interrupts when a compare match occurs, at reload (underflow), at overflow, or when
the counting direction changes, can be controlled individually.
■ List of Registers of the 8/16-bit Up/Down Counters/Timers
The registers for the 8/16-bit up/down counters/timers are shown below.
31
CCRH0
CCRH1*
*: On the MB91F353A/351A/352A/353A, access to the RCR1, UDCR1, CCRH1,
CCRL1, and CSR1 registers is not allowed.
●
Up/down count register (UDCR)
The bit configuration of the up/down count register (UDCR) is shown below.
bit
Address : 0000B3 D07
H
bit 15
Address : 0000B2 D15
H
●
Reload/compare register (RCR)
The bit configuration of the reload/compare register (RCR) is shown below.
bit 7
Address : 0000B1 D07
H
bit 15
Address : 0000B0 D15
H
248
24 23
RCR1* RCR0
CCRL0
CCRL1*
7 6 5 4
D06 D05 D04
14 13 12
D14 D13 D12
6 5 4
D06 D05 D04
14 13 12
D14 D13 D12
16 15 8
UDCR1*
-
-
3 2 1 0
D03 D02 D01 D00 (UDCR0)
11 10 9 8
D11 D10 D09 D08 (UDCR1)
3 2 1 0
D03 D02 D01 D00 (RCR0)
11 10 9 8
D11 D10 D09 D08 (RCR1)
7 0
UDCR0
CSR0
CSR1*
Up/down count register (channel 0)
Up/down count register (channel 1)
Reload/compare register (channel 0)
Reload/compare register (channel 1)