Xilinx MicroBlaze Reference Manual page 83

32-bit soft processor
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The fields are stored in a 32 bit word as defined in
0
1
sign
exponent
The value of a floating point number v in MicroBlaze has the following interpretation:
1. If exponent = 255 and fraction <> 0, then v= NaN, regardless of the sign bit
2. If exponent = 255 and fraction = 0, then v= (-1)
3. If 0 < exponent < 255, then v = (-1)
4. If exponent = 0 and fraction <> 0, then v = (-1)
5. If exponent = 0 and fraction = 0, then v = (-1)
For practical purposes only 3 and 5 are useful, while the others all represent either an error
or numbers that can no longer be represented with full precision in a 32 bit format.
Rounding
The MicroBlaze FPU only implements the default rounding mode, "Round-to-nearest",
specified in IEEE 754. By definition, the result of any floating point operation should return
the nearest single precision value to the infinitely precise result. If the two nearest
representable values are equally near, then the one with its least significant bit zero is
returned.
Operations
All MicroBlaze FPU operations use the processors general purpose registers rather than a
dedicated floating point register file, see
Arithmetic
The FPU implements the following floating point operations:
addition, fadd
subtraction, fsub
multiplication, fmul
division, fdiv
square root, fsqrt (available if
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
9
Figure 2-24: IEEE 754 Single Precision Format
sign
"General Purpose
C_USE_FPU = 2, EXTENDED
www.xilinx.com
Chapter 2: MicroBlaze Architecture
Figure
2-24:
fraction
sign
* ∞
(exponent-127)
* 2
* (1.fraction)
sign
-126
* 2
* (0.fraction)
sign
* 0
Registers".
)
31
83
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