Xilinx MicroBlaze Reference Manual page 204

bs
Barrel Shift
bsrl rD, rA, rB
bsra rD, rA, rB
bsll rD, rA, rB
0 1 0 0 0 1
0 6
Description
Shifts the contents of register rA by the amount specified in register rB and puts the result in register
rD.
The mnemonic bsll sets the S bit (Side bit). If the S bit is set, the barrel shift is done to the left. The
mnemonics bsrl and bsra clear the S bit and the shift is done to the right.
The mnemonic bsra will set the T bit (Type bit). If the T bit is set, the barrel shift performed is
Arithmetical. The mnemonics bsrl and bsll clear the T bit and the shift performed is Logical.
Pseudocode
if S = 1 then
←
(rD) (rA)
else
if T = 1 then
if ((rB)[27:31])
(rD)[0:(rB)[27:31]-1]
(rD)[(rB)[27:31]:31]
else
←
(rD)
else
←
(rD)
Registers Altered
• rD
Latency
• 1 cycle with
• 2 cycles with
Note
These instructions are optional. To use them, MicroBlaze has to be configured to use barrel shift
instructions ( C_USE_BARREL =1).
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
Barrel Shift Right Logical
Barrel Shift Right Arithmetical
Barrel Shift Left Logical
rD rA
1
1
< <
(rB)[27:31]
≠
0 then
←
(rA)[0]
←
(rA)
(rA)
> >
(rA) (rB)[27:31]
=0
C_AREA_OPTIMIZED
=1
C_AREA_OPTIMIZED
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Chapter 5: MicroBlaze Instruction Set Architecture
rB S T 0 0 0 0 0 0 0 0 0
1 2
6 1
> >
(rB)[27:31]
3
1
204
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