xor
Logical Exclusive OR
xor
rD, rA, rB
1 0 0 0 1 0
0
6
Description
The contents of register rA are XORed with the contents of register rB; the result is placed into
register rD.
Pseudocode
←
(rD)
(rA)
Registers Altered
•
rD
Latency
•
1 cycle
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
rD
rA
1
1
⊕
(rB)
www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
rB
0 0 0 0 0 0 0 0 0 0 0
1
2
6
1
3
1
283
Send Feedback