Xilinx MicroBlaze Reference Manual page 53

Real Mode
The processor references memory when it fetches an instruction and when it accesses data
with a load or store instruction. Programs reference memory locations using a 32-bit
effective address calculated by the processor. When real mode is enabled, the physical
address is identical to the effective address and the processor uses it to access physical
memory. After a processor reset, the processor operates in real mode. Real mode can also
be enabled by clearing the VM bit in the MSR.
Physical-memory data accesses (loads and stores) are performed in real mode using the
effective address. Real mode does not provide system software with virtual address
translation, but the full memory access-protection is available, implemented when
> 1 (User Mode) and
C_USE_MMU
real-mode memory manager is more straightforward than a virtual-mode memory
manager. Real mode is often an appropriate solution for memory management in simple
embedded environments, when access-protection is necessary, but virtual address
translation is not required.
Virtual Mode
In virtual mode, the processor translates an effective address into a physical address using
the process shown in
MSR.
0
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
C_AREA_OPTIMIZED
Figure 2-18. Virtual mode can be enabled by setting the VM bit in the
0
0
Effective Page Number
8
PID Effective Page Number
Translation Look-Aside
Buffer (TLB) Look-Up
0
Real Page Number
Figure 2-18: Virtual-Mode Address Translation
www.xilinx.com
Chapter 2: MicroBlaze Architecture
= 0 (Performance). Implementation of a
24 31
Process ID Register
PID
n 31
32-Bit Effective Address
Offset
n+8 39
40-Bit Virtual Address
Offset
n 31
32-Bit Physical Address
Offset
Send Feedback
UG011_37_021302
53