Xilinx MicroBlaze Reference Manual page 253

putd
Put to stream interface dynamic
naputd rA, rB
tnaputd rB
ncaputd rA, rB
tncaputd rB
0 1 0 0 1 1 0 0 0 0 0
0
Description
MicroBlaze will write the value from register rA to the link interface defined by the four least
significant bits in rB. If the available number of links set by C_FSL_LINKS is less than or equal to the
four least significant bits in rB, link 0 is used.
The putd instruction has 16 variants.
The blocking versions (when 'n' is '0') will stall MicroBlaze until there is space available in the
interface. The non-blocking versions will not stall MicroBlaze and will set carry to '0' if space was
available and to '1' if no space was available.
All data putd instructions (when 'c' is '0') will set the control bit to the interface to '0' and all control
putd instructions (when 'c' is '1') will set the control bit to '1'.
The test versions (when 't' bit is '1') will be handled as the normal case, except that the write signal
to the link is not asserted (thus no source register is required).
Atomic versions (when 'a' bit is '1') are not interruptible. This means that a sequence of atomic
instructions can be grouped together without an interrupt breaking the program flow. However, note
that exceptions may still occur.
When MicroBlaze is configured to use an MMU ( C_USE_MMU >= 1) and not explicitly allowed by
setting C_MMU_PRIVILEGED_INSTR to 1 these instructions are privileged. This means that if these
instructions are attempted in User Mode (MSR[UM] = 1) a Privileged Instruction exception occurs.
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
put data to link rB[28:31]
n = non-blocking
a = atomic
put data to link rB[28:31] test-only
n = non-blocking
a = atomic
put control to link rB[28:31]
n = non-blocking
a = atomic
put control to link rB[28:31] test-only
n = non-blocking
a = atomic
rA
6 11
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Chapter 5: MicroBlaze Instruction Set Architecture
rB 1 n c t a 0 0 0 0 0 0
16 21 31
253
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