Xilinx MicroBlaze Reference Manual page 270

src
Shift Right with Carry
src
1 0 0 1 0 0
0 6
Description
Shifts the contents of register rA, one bit to the right, and places the result in rD. The Carry flag
is shifted in the shift chain and placed in the most significant bit of rD. The least significant bit
coming out of the shift chain is placed in the Carry flag.
Pseudocode
(rD)[0]
(rD)[1:31]
MSR[C]
Registers Altered
• rD
• MSR[C]
Latency
• 1 cycle
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
rD, rA
rD rA
1
1
←
MSR[C]
← (
rA)[0:30]
←
(rA)[31]
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Chapter 5: MicroBlaze Instruction Set Architecture
0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1
1
6
3
1
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