Xilinx MicroBlaze Reference Manual page 108

Features
An overview of all MicroBlaze fault tolerance features is given here. Further details on each
feature can be found in the following sections:
• "Instruction Cache Operation"
• "Data Cache Operation"
• "UTLB Management"
• "Branch Target Cache"
• "Instruction Bus Exception"
• "Data Bus Exception"
• "Exception Causes"
The LMB BRAM Interface Controller v4.0 or later provides the LMB ECC implementation. For
details, including performance and resource utilization, see the LogiCORE IP LMB BRAM
Interface Controller (PG112) product guide, in the Xilinx IP Documentation.
Instruction and Data Cache Protection
To protect the block RAM in the Instruction and Data Cache, parity is used. When a parity
error is detected, the corresponding cache line is invalidated. This forces the cache to reload
the correct value from external memory. Parity is checked whenever a cache hit occurs.
Note that this scheme only works for write-through, and thus write-back data cache is not
available when fault tolerance is enabled. This is enforced by a DRC.
When new values are written to a block RAM in the cache, parity is also calculated and
written. One parity bit is used for the tag, one parity bit for the instruction cache data, and
one parity bit for each word in a data cache line.
In many cases, enabling fault tolerance does not increase the required number of cache
block RAMs, since spare bits can be used for the parity. Any increase in resource utilization,
in particular number of block RAMs, can easily be seen in the MicroBlaze configuration
dialog, when enabling fault tolerance.
Memory Management Unit Protection
To protect the block RAM in the MMU Unified Translation Look-Aside Buffer (UTLB), parity
is used. When a parity error is detected during an address translation, a TLB miss exception
occurs, forcing software to reload the entry.
When a new TLB entry is written using the TLBHI and TLBLO registers, parity is calculated.
One parity bit is used for each entry.
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
www.xilinx.com
Chapter 2: MicroBlaze Architecture
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