Xilinx MicroBlaze Reference Manual page 255

rsub
Arithmetic Reverse Subtract
rsub
rsubc
rsubk
rsubkc
0 0 0 K C 1
0 6
Description
The contents of register rA is subtracted from the contents of register rB and the result is placed
into register rD. Bit 3 of the instruction (labeled as K in the figure) is set to one for the mnemonic
rsubk. Bit 4 of the instruction (labeled as C in the figure) is set to one for the mnemonic rsubc.
Both bits are set to one for the mnemonic rsubkc.
When an rsub instruction has bit 3 set (rsubk, rsubkc), the carry flag will Keep its previous value
regardless of the outcome of the execution of the instruction. If bit 3 is cleared (rsub, rsubc), then
the carry flag will be affected by the execution of the instruction.
When bit 4 of the instruction is set to one (rsubc, rsubkc), the content of the carry flag (MSR[C])
affects the execution of the instruction. When bit 4 is cleared (rsub, rsubk), the content of the carry
flag does not affect the execution of the instruction (providing a normal subtraction).
Pseudocode
if C = 0 then
←
(rD)
else
←
(rD)
if K = 0 then
MSR[C]
Registers Altered
• rD
• MSR[C]
Latency
• 1 cycle
Notes
In subtractions, Carry = (Borrow). When the Carry is set by a subtraction, it means that there is no
Borrow, and when the Carry is cleared, it means that there is a Borrow.
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
rD, rA, rB Subtract
rD, rA, rB Subtract with Carry
rD, rA, rB Subtract and Keep Carry
rD, rA, rB Subtract with Carry and Keep Carry
rD rA
1
1
(rA) + 1
(rB) +
(rA)
(rB) + + MSR[C]
←
CarryOut
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Chapter 5: MicroBlaze Instruction Set Architecture
rB 0 0 0 0 0 0 0 0 0 0 0
1 2
6 1
3
1
255
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