Register Usage Conventions - Xilinx MicroBlaze Reference Manual

32-bit soft processor
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Register Usage Conventions

The register usage convention for MicroBlaze is given in
Table 4-2: Register Usage Conventions
Register
Type
R0
Dedicated
R1
Dedicated
R2
Dedicated
R3-R4
Volatile
R5-R10
Volatile
R11-R12
Volatile
R13
Dedicated
R14
Dedicated
R15
Dedicated
R16
Dedicated
R17
Dedicated
R18
Dedicated
R19
Non-volatile
R20
Dedicated
or
Non-volatile
R21-R31
Non-volatile
RPC
Special
RMSR
Special
REAR
Special
RESR
Special
RFSR
Special
RBTR
Special
REDR
Special
RPID
Special
RZPR
Special
RTLBLO
Special
RTLBHI
Special
RTLBX
Special
RTLBSX
Special
RPVR0-12
Special
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
Chapter 4: MicroBlaze Application Binary Interface
Enforcement
HW
Value 0
SW
Stack Pointer
SW
Read-only small data area anchor
SW
Return Values/Temporaries
SW
Passing parameters/Temporaries
SW
Temporaries
SW
Read-write small data area anchor
HW
Return address for Interrupt
SW
Return address for Sub-routine
HW
Return address for Trap (Debugger)
HW/SW
Return address for Exceptions
HW, if configured to support hardware exceptions, else SW
SW
Reserved for Assembler/Compiler Temporaries
SW
Must be saved across function calls. Callee-save
SW
Reserved for storing a pointer to the Global Offset Table (GOT) in
Position Independent Code (PIC). Non-volatile in non-PIC code.
Must be saved across function calls. Callee-save
SW
Must be saved across function calls. Callee-save
HW
Program counter
HW
Machine Status Register
HW
Exception Address Register
HW
Exception Status Register
HW
Floating Point Status Register
HW
Branch Target Register
HW
Exception Data Register
HW
Process Identifier Register
HW
Zone Protection Register
HW
Translation Look-Aside Buffer Low Register
HW
Translation Look-Aside Buffer High Register
HW
Translation Look-Aside Buffer Index Register
HW
Translation Look-Aside Buffer Search Index
HW
Processor Version Register 0 through 12
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Table
4-2.
Purpose
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