Interrupt, Break And Exception Handling - Xilinx MicroBlaze Reference Manual

Interrupt, Break and Exception Handling

MicroBlaze assumes certain address locations for handling interrupts and exceptions as
indicated in Table
handlers.
Table 4-4: Interrupt and Exception Handling
Start / Reset
User exception
Interrupt
Break (HW/SW)
Hardware exception
Reserved by Xilinx for future use
1. With low-latency interrupt mode, the vector address is supplied by the Interrupt Controller.
The code expected at these locations is as shown below. The crt0.o initialization file is
passed by the mb-gcc compiler to the mb-ld linker for linking. This file sets the
appropriate addresses of the exception handlers.
The following is code for passing control to Exception, Break and Interrupt handlers,
assuming the default
0x00:
0x04:
0x08:
0x0c:
0x10:
0x14:
0x18:
0x1c:
0x20:
0x24:
With low-latency interrupt mode, control is directly passed to the interrupt handler for each
individual interrupt utilizing this mode. In this case, it is the responsibility of each handler
to save and restore used registers. The MicroBlaze C compiler (mb-gcc) attribute
fast_interrupt
void interrupt_handler_name() __attribute__((fast_interrupt));
MicroBlaze allows exception and interrupt handler routines to be located at any address
location addressable using 32 bits.
The user exception handler code starts with the label _exception_handler, the
hardware exception handler starts with _hw_exception_handler, while the interrupt
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
4-4. At these locations, code is written to jump to the appropriate
On
C_BASE_VECTORS
C_BASE_VECTORS
C_BASE_VECTORS
C_BASE_VECTORS
C_BASE_VECTORS
C_BASE_VECTORS
C_BASE_VECTORS
C_BASE_VECTORS
bri _start1
nop
imm high bits of address (user exception handler)
bri _exception_handler
imm high bits of address (interrupt handler)
bri _interrupt_handler
imm high bits of address (break handler)
bri low bits of address (break handler)
imm high bits of address (HW exception handler
bri _hw_exception_handler
is available to allow this task to be performed by the compiler:
www.xilinx.com
Chapter 4: MicroBlaze Application Binary Interface
Hardware jumps to
+ 0x0
+ 0x8
1
+ 0x10
+ 0x18
+ 0x20
+ 0x28 -
+ 0x4F
value of 0x00000000:
Software Labels
_start
_exception_handler
_interrupt_handler
-
_hw_exception_handler
-
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