Xilinx MicroBlaze Reference Manual page 61

• From privileged mode:
The TLB entry specifies a read-only page (TLBLO[WR]=0) that is not otherwise
¨
overridden by the zone field (ZPR[Zn]‚ 10 and ZPR[Zn]‚ 11). This applies to store
instructions.
Instruction-Storage Exception
When virtual mode is enabled, (MSR[VM]=1), an instruction-storage exception occurs when
access to a page is not permitted for any of the following reasons:
• From user mode:
The TLB entry specifies a zone field that prevents access to the page (ZPR[Zn]=00).
¨
The TLB entry specifies a non-executable page (TLBLO[EX]=0) that is not otherwise
¨
overridden by the zone field (ZPR[Zn]‚ 11).
The TLB entry specifies a guarded-storage page (TLBLO[G]=1).
¨
• From privileged mode:
The TLB entry specifies a non-executable page (TLBLO[EX]=0) that is not otherwise
¨
overridden by the zone field (ZPR[Zn]‚ 10 and ZPR[Zn]‚ 11).
The TLB entry specifies a guarded-storage page (TLBLO[G]=1).
¨
Data TLB-Miss Exception
When virtual mode is enabled (MSR[VM]=1) a data TLB-miss exception occurs if a valid,
matching TLB entry was not found in the TLB (shadow and UTLB). Any load or store
instruction can cause a data TLB-miss exception.
Instruction TLB-Miss Exception
When virtual mode is enabled (MSR[VM]=1) an instruction TLB-miss exception occurs if a
valid, matching TLB entry was not found in the TLB (shadow and UTLB). Any instruction
fetch can cause an instruction TLB-miss exception.
Access Protection
System software uses access protection to protect sensitive memory locations from
improper access. System software can restrict memory accesses for both user-mode and
privileged-mode software. Restrictions can be placed on reads, writes, and instruction
fetches. Access protection is available when virtual protected mode is enabled.
Access control applies to instruction fetches, data loads, and data stores. The TLB entry for
a virtual page specifies the type of access allowed to the page. The TLB entry also specifies
a zone-protection field in the zone-protection register that is used to override the access
controls specified by the TLB entry.
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
www.xilinx.com
Chapter 2: MicroBlaze Architecture
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