Xilinx MicroBlaze Reference Manual page 143

32-bit soft processor
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LMB Transactions
The following diagrams provide examples of LMB bus operations.
Generic Write Operations
Clk
Addr
Byte_Enable
Data_Write
AS
Read_Strobe
Write_Strobe
Data_Read
Ready
Wait
CE
UE
Clk
Addr
Byte_Enable
Data_Write
AS
Read_Strobe
Write_Strobe
Data_Read
Ready
Wait
CE
UE
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
A0
BE0
D0
Don't Care
Figure 3-2: LMB Generic Write Operation, 0 Wait States
A0
BE0
D0
Figure 3-3: LMB Generic Write Operation, N Wait States
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Chapter 3: MicroBlaze Signal Interface Description
Don't Care
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