Xilinx MicroBlaze Reference Manual page 246

or
Logical OR
or
1 0 0 0 0 0
0 6
Description
The contents of register rA are ORed with the contents of register rB; the result is placed into
register rD.
Pseudocode
←
(rD)
Registers Altered
• rD
Latency
• 1 cycle
Note
The assembler pseudo-instruction nop is implemented as "or r0, r0, r0".
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
rD, rA, rB
rD rA
1
1
∨
(rA) (rB)
www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
rB 0 0 0 0 0 0 0 0 0 0 0
1 2
6 1
3
1
246
Send Feedback