Xilinx MicroBlaze Reference Manual page 289

Table A-9: Device Utilization - Zynq UltraScale+ FPGAs (XCZU9EG ffvb1156-3)
Minimum Area
Maximum Performance
Maximum Frequency
Linux with MMU
Low-end Linux with MMU
Typical
Table A-10: Parameter Configurations
C_ALLOW_DCACHE_WR
C_ALLOW_ICACHE_WR
C_AREA_OPTIMIZED
C_CACHE_BYTE_SIZE
C_DCACHE_BYTE_SIZE
C_DCACHE_LINE_LEN
C_DCACHE_USE_WRITEBACK
C_DEBUG_ENABLED
C_DIV_ZERO_EXCEPTION
C_M_AXI_D_BUS_EXCEPTION
C_FPU_EXCEPTION
C_FSL_EXCEPTION
C_FSL_LINKS
C_ICACHE_LINE_LEN
C_ILL_OPCODE_EXCEPTION
C_M_AXI_I_BUS_EXCEPTION
C_MMU_DTLB_SIZE
C_MMU_ITLB_SIZE
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
Configuration
Parameter
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Appendix A: Performance and Resource Utilization
LUTs
556
3718
914
3318
2778
1886
Configuration Parameter Values
1 1
1 1
1 0
4096 32768 4096
4096 32768 4096
4 8
0 1
0 1
0 0
0 0
0 0
0 0
0 0
4 8
0 0
0 0
2 4
1 2
Device Resources
F
max
FFs
(MHz)
223 549
2927 333
554 562
3064 290
2448 308
1631 398
1 1 1 1
1 1 1 1
0 0 0 0
16384 8192 8192
16384 8192 8192
4 4 4 4
0 0 0 0
0 1 1 1
0 1 0 0
0 1 1 1
0 0 0 0
0 0 0 0
1 0 0 0
4 8 4 8
0 1 1 0
0 1 1 0
2 4 4 4
1 2 2 2
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