Xilinx MicroBlaze Reference Manual page 139

reads as long as data is available. If data is not available, the processor stalls at this
instruction until it becomes available. In the non-blocking mode (instructions with prefix n),
the transfer is completed in one or two clock cycles irrespective of whether or not data was
available. In case data was not available, the transfer of data does not take place and the
carry bit is set in the MSR.
The data get instructions (without prefix c) expect the AXI4-Stream TLAST input to be
cleared to '0', otherwise the instructions will set MSR[FSL] to '1'. Conversely, the control get
instructions (with prefix c) expect the TLAST input to be set to '1', otherwise the instructions
will set MSR[FSL] to '1'. This can be used to check for the boundary of a packet.
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
Chapter 3: MicroBlaze Signal Interface Description
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