Fault Tolerance - Xilinx MicroBlaze Reference Manual

Fault Tolerance

The fault tolerance features included in MicroBlaze, enabled with
provide Error Detection for internal block RAMs (in the Instruction Cache, Data Cache,
Branch Target Cache, and MMU), and support for Error Detection and Correction (ECC) in
LMB block RAMs. When fault tolerance is enabled, all soft errors in block RAMs are detected
and corrected, which significantly reduces overall failure intensity.
In addition to protecting block RAM, the FPGA configuration memory also generally needs
to be protected. A detailed explanation of this topic, and further references, can be found in
the document LogiCore IP Soft Error Mitigation Controller (PG036).
Configuration
Using MicroBlaze Configuration
Fault tolerance can be enabled in the MicroBlaze configuration dialog, on the General page.
After enabling fault tolerance in MicroBlaze, ECC is automatically enabled in the connected
LMB BRAM Interface Controllers by the tools, when the system is generated. This means
that nothing else needs to be configured to enable fault tolerance and minimal ECC
support.
It is possible (albeit not recommended) to manually override ECC support, leaving the LMB
BRAM unprotected, by disabling
BRAM Interface Controllers. In this case, the internal MicroBlaze block RAM protection is
still enabled, since fault tolerance is enabled.
Using LMB BRAM Interface Controller Configuration
As an alternative to the method described above, it is also possible to enable ECC in the
configuration dialogs of all connected LMB BRAM Interface Controllers. In this case, fault
tolerance is automatically enabled in MicroBlaze by the tools, when the system is
generated. This means that nothing else needs to be configured to enable ECC support and
MicroBlaze fault tolerance.
ECC must either be enabled or disabled in all Controllers, which is enforced by a DRC.
It is possible to manually override fault tolerance support in MicroBlaze, by explicitly
disabling
C_FAULT_TOLERANT
recommended, unless no block RAM is used in MicroBlaze, and there is no need to handle
bus exceptions from uncorrectable ECC errors.
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
in the configuration dialogs of all connected LMB
C_ECC
in the MicroBlaze configuration dialog. This is not
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Chapter 2: MicroBlaze Architecture
C_FAULT_TOLERANT
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