Xilinx MicroBlaze Reference Manual page 21

• Performance can be improved by minimizing looping on an LWX instruction that fails to
return a desired value. Performance can also be improved by using an ordinary load
instruction to do the initial value check. An implementation of a spinlock exemplifies
this:
loop: lw
bnei
lwx
bnei
addik r5,r5,1
swx
addic r5,r0,0
bnei
• Minimizing the looping on an LWX/SWX instruction pair increases the likelihood that
forward progress is made. The old value should be tested before attempting the store.
If the order is reversed (store before load), more SWX instructions are executed and
reservations are more likely to be lost between the LWX and SWX instructions.
Self-modifying Code
When using self-modifying code software must ensure that the modified instructions have
been written to memory prior to fetching them for execution. There are several aspects to
consider:
• The instructions to be modified may already have been fetched prior to modification:
into the instruction prefetch buffer,
¨
into the instruction cache, if it is enabled,
¨
into a stream buffer, if instruction cache stream buffers are used,
¨
into the instruction cache, and then saved in a victim buffer, if victim buffers are
¨
used.
To ensure that the modified code is always executed instead of the old unmodified
code, software must handle all these cases.
• If one or more of the instructions to be modified is a branch, and the branch target
cache is used, the branch target address may have been cached.
To avoid using the cached branch target address, software must ensure that the branch
target cache is cleared prior to executing the modified code.
• The modified instructions may not have been written to memory prior to execution:
they may be en route to memory, in temporary storage in the interconnect or the
¨
memory controller,
they may be stored in the data cache, if write-back cache is used,
¨
they may be saved in a victim buffer, if write-back cache and victim buffers are used.
¨
Software must ensure that the modified instructions have been written to memory
before being fetched by the processor.
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
r5,r3,r0 ; load the word
r5,loop ; loop back if word not equal to 0
r5,r3,r0 ; try reserving again
r5,loop ; likely that no branch is needed
; increment value
r5,r3,r0 ; try to store non-zero value
; check reservation
r5,loop ; loop if reservation lost
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Chapter 2: MicroBlaze Architecture
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