Xilinx MicroBlaze Reference Manual page 2

Revision History
06/08/2016: Released with Vivado Design Suite 2016.2 without changes from the previous version.
The following table shows the revision history for this document.
Date Version
03/20/2013 2013.1
06/19/2013 2013.2
10/02/2013
2013.3
12/18/2013
2013.4
04/02/2014 2014.1
10/01/2014
2014.3
04/15/2015 2015.1
04/06/2016 2016.1
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
Initial Xilinx release. This User Guide is derived from UG081.
Updated for Vivado 2013.2 release.
Updated for Vivado 2013.3 release.
Updated for Vivado 2013.4 release.
Updated for Vivado 2014.1 release:
• Added v9.3 to MicroBlaze release version code in PVR.
• Clarified availability and behavior of stack protection registers.
• Corrected description of LMB instruction and data bus exception.
• Included description of extended debug features, new in version 9.3:
performance monitoring, program trace and non-intrusive profiling.
• Included definition of Reset Mode signals, new in version 9.3.
• Clarified how the AXI4-Stream TLAST signal is handled.
• Added UltraScale and updated performance and resource utilization for 2014.1.
Updated for Vivado 2014.3 release:
• Corrected semantic description for PCMPEQ and PCMPNE in Table 2.1.
• Added version 9.4 to MicroBlaze release version code in PVR.
• Included description of external program trace, new in version 9.4
Updated for Vivado 2015.1 release:
• Included description of 16 word cache line length, new in version 9.5.
• Added version 9.5 to MicroBlaze release version code in PVR.
• Corrected description of supported endianness and parameter C_ENDIANNESS.
• Corrected description of outstanding reads for instruction and data cache.
• Updated FPGA configuration memory protection document reference
• Corrected Bus Index Range definitions for Lockstep Comparison in
• Clarified registers altered for IDIV instruction.
• Corrected PVR assembler mnemonics for MFS instruction.
• Updated performance and resource utilization for 2015.1.
• Added references to training resources.
Updated for Vivado 2016.1 release:
• Included description of address extension, new in version 9.6.
• Included description of pipeline pause functionality, new in version 9.6
• Included description of non-secure AXI access support, new in version 9.6.
• Included description of hibernate and suspend instructions, new in version 9.6.
• Added version 9.6 to MicroBlaze release version code in PVR.
• Corrected references to
• Replaced references to the deprecated Xilinx Microprocessor Debugger (XMD)
with Xilinx System Debugger (XSDB).
• Removed C code function attributes svc_handler and svc_table_handler.
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Revision
Table 2-45 and Table 2-46.
[Ref 10].
Table 3-13.
2
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