Xilinx MicroBlaze Reference Manual page 38

0
↑
MISS
Table 2-22: Translation Look-Aside Buffer Index Register (TLBX)
Bits Name
0 MISS
1:25 Reserved
26:31 INDEX
Translation Look-Aside Buffer Search Index Register (TLBSX)
The Translation Look-Aside Buffer Search Index Register is used to search for a virtual page
number in the Unified Translation Look-Aside Buffer (UTLB). It is controlled by the
configuration option on MicroBlaze. The register is only implemented if
C_USE_MMU
is greater than 1 (User Mode), and
C_USE_MMU
When written with the MTS instruction, the TLBSX is specified by setting Sa = 0x1005.
Figure 2-17 illustrates the TLBSX register and
values.
0
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
↑
Reserved
Figure 2-16: TLBX
TLB Miss
This bit is cleared to 0 when the TLBSX register is written with a
virtual address, and the virtual address is found in a TLB entry.
The bit is set to 1 if the virtual address is not found. It is also cleared
when the TLBX register itself is written.
Read Only
Can be read if the memory management special registers
parameter C_MMU_TLB_ACCESS > 0 (MINIMAL).
TLB Index
This field is used to index the Translation Look-Aside Buffer entry
accessed by the TLBLO and TLBHI registers. The field is updated
with a TLB index when the TLBSX register is written with a virtual
address, and the virtual address is found in the corresponding TLB
entry.
Read/Write
Can be read and written if the memory management special
registers parameter C_MMU_TLB_ACCESS > 0 (MINIMAL).
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Figure 2-17: TLBSX
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Chapter 2: MicroBlaze Architecture
Description
C_AREA_OPTIMIZED
Table 2-23 provides bit descriptions and reset
22
26
↑
INDEX
Reset Value
0
000000
is set to 0 (Performance).
↑
Reserved
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31
31
38