Xilinx MicroBlaze Reference Manual page 212

32-bit soft processor
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fcmp
Floating Point Number Comparison
fcmp.un
fcmp.lt
fcmp.eq
fcmp.le
fcmp.gt
fcmp.ne
fcmp.ge
0 1 0 1 1 0
0
6
Description
The floating point value in rB is compared with the floating point value in rA and the comparison
result is placed into register rD. The OpSel field in the instruction code determines the type of
comparison performed.
Pseudocode
if isDnz(rA) or isDnz(rB) then
(rD)
FSR[DO]
ESR[EC]
else
{read out behavior from
Registers Altered
rD, unless an FP exception is generated, in which case the register is unchanged
ESR[EC], if an FP exception is generated
FSR[IO,DO]
Latency
1 cycle with
3 cycles with
Note
These instructions are only available when the MicroBlaze parameter C_USE_FPU is greater than 0.
Table 5-2, page 213
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
rD, rA, rB
Unordered floating point comparison
rD, rA, rB
Less-than floating point comparison
rD, rA, rB
Equal floating point comparison
rD, rA, rB
Less-or-Equal floating point comparison
rD, rA, rB
Greater-than floating point comparison
rD, rA, rB
Not-Equal floating point comparison
rD, rA, rB
Greater-or-Equal floating point
comparison
rD
rA
11
0
1
00110
Table
=0
C_AREA_OPTIMIZED
=1
C_AREA_OPTIMIZED
lists the floating point comparison operations.
www.xilinx.com
Chapter 5: MicroBlaze Instruction Set Architecture
rB
0 1 0 0
16
21
5-2}
OpSel
0 0 0 0
25
28
31
212
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