Xilinx MicroBlaze Reference Manual page 205

bsi
Barrel Shift Immediate
bsrli rD, rA, IMM
bsrai rD, rA, IMM
bslli rD, rA, IMM
0 1 1 0 0 1
0 6
Description
Shifts the contents of register rA by the amount specified by IMM and puts the result in register rD.
The mnemonic bsll sets the S bit (Side bit). If the S bit is set, the barrel shift is done to the left. The
mnemonics bsrl and bsra clear the S bit and the shift is done to the right.
The mnemonic bsra will set the T bit (Type bit). If the T bit is set, the barrel shift performed is
Arithmetical. The mnemonics bsrl and bsll clear the T bit and the shift performed is Logical.
Pseudocode
if S = 1 then
←
(rD) (rA)
else
if T = 1 then
≠
if IMM
(rD)[0:IMM-1]
(rD)[IMM:31]
else
←
(rD)
else
←
(rD)
Registers Altered
• rD
Latency
• 1 cycle with
• 2 cycles with
Notes
These are not Type B Instructions. There is no effect from a preceding imm instruction.
These instructions are optional. To use them, MicroBlaze has to be configured to use barrel shift
instructions ( C_USE_BARREL =1).
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
Barrel Shift Right Logical Immediate
Barrel Shift Right Arithmetical Immediate
Barrel Shift Left Logical Immediate
rD rA
1
1
< <
IMM
0 then
←
(rA)[0]
← > >
(rA) IMM
(rA)
> >
(rA) IMM
=0
C_AREA_OPTIMIZED
=1
C_AREA_OPTIMIZED
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Chapter 5: MicroBlaze Instruction Set Architecture
0 0 0 0 0 S T 0 0 0 0
1 2
6 1
IMM
2 3
7 1
205
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