Xilinx MicroBlaze Reference Manual page 210

fmul
Floating Point Arithmetic Multiplication
fmul
0 1 0 1 1 0
0 6
Description
The floating point value in rA is multiplied with the floating point value in rB and the result is
placed into register rD.
Pseudocode
if isDnz(rA) or isDnz(rB) then
←
(rD)
FSR[DO]
ESR[EC]
else
if isSigNaN(rA) or isSigNaN(rB) or (isZero(rA) and isInfinite(rB)) or
(isZero(rB) and isInfinite(rA)) then
(rD)
FSR[IO]
ESR[EC]
else if isQuietNaN(rA) or isQuietNaN(rB) then
(rD)
else if isDnz((rB)*(rA)) then
(rD)
FSR[UF]
ESR[EC]
else if isNaN((rB)*(rA)) then
(rD)
FSR[OF]
ESR[EC]
else
(rD)
Registers Altered
• rD, unless an FP exception is generated, in which case the register is unchanged
• ESR[EC], if an FP exception is generated
• FSR[IO,UF,OF,DO]
Latency
• 4 cycles with
• 6 cycles with
Note
This instruction is only available when the MicroBlaze parameter C_USE_FPU is greater than 0.
MicroBlaze Processor Reference Guide
UG984 (v2016.2) June 8, 2016
UG984 (v2016.1) April 6, 2016
rD, rA, rB Multiply
rD rA
11
0xFFC00000
←
1
←
00110
←
0xFFC00000
←
1
←
00110
←
0xFFC00000
←
signZero((rA)*(rB))
←
1
←
00110
←
signInfinite((rB)*(rA))
←
1
←
00110
←
(rB) * (rA)
C_AREA_OPTIMIZED
C_AREA_OPTIMIZED
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Chapter 5: MicroBlaze Instruction Set Architecture
rB 0 0 1 0 0 0 0 0 0 0 0
16 21
=0
=1
31
210
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