Sony GY-8240UWD Maintenance Manual page 236

5-4. DIAG Mode
5. EE loop back test (SYS CPU)
Function: The EE loop back test forwards the data in the Bank memory through the actual transmis-
sion route, and then compares the returned data with the original one. The verify test is
executed in the ID size of DTF-2. It will be performed 12 times in various patterns
Operation: Enter "63"".
a. Loop back test in the PROC block
Function: Performs the loop back test to including the PROC block on the DPR board. If some error
occurs, it will be caused by failures of the DPR or FM board.
Operation: Enter "2"".
b. Loop back test in the EQ block
Function: Performs the loop back test to including the EQ block. If some error occurs, it will be caused
by failures of the DPR or FM board.
Operation: Enter "3"".
c. Loop back test (with CRC) in the PROC block
Function: Performs the loop back test (with the CRC error correction code) to including the PROC
block on the DPR board. If some error occurs, it will be caused by failures of the DPR or
FM board.
Operation: Enter "5"".
d. Loop back test (with CRC) in the EQ block
Function: Performs the loop back test (with the CRC error correction code) to including the EQ block.
If some error occurs, it will be caused by failures of the DPR or FM board.
Operation: Enter "6"".
5-20
GY-8240UWD
GY-8240FC