Etm (Embedded Trace Macrocell); General Description; Signal Protocol, Packet Types; Main Etm Registers - ST STM32F423 Reference Manual

Debug support (DBG)
Example of configuration
To output a simple value to the TPIU:
•
Configure the TPIU and assign TRACE I/Os by configuring the DBGMCU_CR (refer to
Section 34.17.2: TRACE pin assignment
configuration
• Write 0xC5ACCE55 to the ITM Lock Access Register to unlock the write access to the
ITM registers
•
Write 0x00010005 to the ITM Trace Control Register to enable the ITM with Sync
enabled and an ATB ID different from 0x00
•
Write 0x1 to the ITM Trace Enable Register to enable the Stimulus Port 0
•
Write 0x1 to the ITM Trace Privilege Register to unmask stimulus ports 7:0
•
Write the value to output in the Stimulus Port Register 0: this can be done by software
(using a printf function)
34.15

ETM (Embedded trace macrocell)

34.15.1

General description

The ETM enables the reconstruction of program execution. Data are traced using the Data
Watchpoint and Trace (DWT) component or the Instruction Trace Macrocell (ITM) whereas
instructions are traced using the Embedded Trace Macrocell (ETM).
The ETM transmits information as packets and is triggered by embedded resources. These
resources must be programmed independently and the trigger source is selected using the
Trigger Event Register (0xE0041008). An event could be a simple event (address match
from an address comparator) or a logic equation between 2 events. The trigger source is
one of the fourth comparators of the DWT module, The following events can be monitored:
•
Clock cycle matching
•
Data address matching
For more informations on the trigger resources refer to
watchpoint
The packets transmitted by the ETM are output to the TPIU (Trace Port Interface Unit). The
formatter of the TPIU adds some extra packets (refer to
interface
34.15.2

Signal protocol, packet types

This part is described in the chapter 7 ETMv3 Signal Protocol of the Arm
document.
34.15.3

Main ETM registers

For more information on registers refer to the chapter 3 of the Arm
1302/1324
register)
trigger).
unit)) and then outputs the complete packet sequence to the debugger host.
and Section 34.16.3: Debug MCU
RM0430 Rev 8
Section 34.13: DWT (data
Section 34.17: TPIU (trace port
®
IHI 0014N
®
IHI 0014N specification.
RM0430