Revision History; Table 249. Document Revision History - ST STM32F423 Reference Manual

Revision history

36 Revision history
03-Nov-2016
15-Dec-2016
09-Mar-2017
03-May-2017
12-Jun-2017
22-Sep-2017
1318/1324

Table 249. Document revision history

Date Revision
1 Initial release.
Updated:
– Section 18: General-purpose timers (TIM2 to TIM5)
2
– Section 19: General-purpose timers (TIM9 to TIM14)
– Section 20: Basic timers (TIM6/7)
Updated:
– Section 11.1: FSMC main features
– Section 11.4: External device address mapping
3 – Section 11.4.1: NOR/PSRAM address mapping
Added:
– Section 12.3.2: QUADSPI pins
– Table 71: QUADSPI pins
Updated:
– Section 13: Analog-to-digital converter (ADC)
4
– Section 25: Real-time clock (RTC)
– Section 29: Serial peripheral interface/ inter-IC sound
(SPI/I2S)
Updated:
– Table 5: Flash module organization
– Section 3.4.1: Relation between CPU clock frequency
and Flash memory read time
– Section 3.5.3: Erase
– Section 3.6.4: Write protections
5
– Section 3.8.5: Flash control register (FLASH_CR)
– Table 40: Vector table for STM32F413/423
– Section 10.2.5: External interrupt/event line mapping
– Section 10.3: EXTI registers
– Table 41: External interrupt/event controller register
map and reset values
Updated:
6 – Table 13: Flash register map and reset values
– Section 32: Controller area network (bxCAN)
RM0430 Rev 8
Changes
RM0430