List Of Figures - Analog Devices ADV7850 Hardware Manual

ADV7850

LIST OF FIGURES

Figure 1: Field Description Format ................................................................................................................................................................... 13
Figure 2: Functional Block Diagram ................................................................................................................................................................. 19
Figure 3: ADV7850 Pin Configuration ............................................................................................................................................................ 20
Figure 4: Required Hardware Configuration When Using +5 V from HDMI Source(s) to Provide EDID Support in Powered Off
State ............................................................................................................................................................................................................. 32
Figure 5: Analog Inputs Hardware Configuration ......................................................................................................................................... 42
Figure 6: Video Input Signal Level Prior to 24 Ohm to 51 Ohm Resistor Divider .................................................................................... 43
Figure 7: Video Input Signal Level After Voltage Clamps ............................................................................................................................. 43
Figure 8: SDP Clamping Overview ................................................................................................................................................................... 44
Figure 9: ADV7850 Typical Configurations .................................................................................................................................................... 45
Figure 10: ADV7850 Input Functional Diagram ............................................................................................................................................ 46
Figure 11: Synchronization Stripper Circuit ................................................................................................................................................... 51
Figure 12: D-Terminal Resistor Dividers ......................................................................................................................................................... 54
Figure 13: Trilevel Slicer ..................................................................................................................................................................................... 54
Figure 14: ADV7850 Fast Blanking Configuration ........................................................................................................................................ 64
Figure 15: Response of Anti Aliasing Filters .................................................................................................................................................... 68
Figure 16: Block Diagram of SDP ..................................................................................................................................................................... 69
Figure 17: SDP Gain Control Overview ........................................................................................................................................................... 82
Figure 18: 3D Comb and Motion Detection Operation................................................................................................................................. 87
Figure 19: Y Shaping Filter Flowchart .............................................................................................................................................................. 94
Figure 20: Y Shaping Filter Selection from No. 0 to No. 13 in Table 10...................................................................................................... 97
Figure 21: Y Shaping Filter Selection from No. 14 to 20 in Table 10 ........................................................................................................... 98
Figure 22: Y Shaping Filter Selection from No. 21 to 24 in Table 10 ........................................................................................................... 98
Figure 23: Y Shaping Filter Selection from No. 25 to 27 in Table 10 ........................................................................................................... 99
Figure 24: Y Shaping Filter Selection from No. 28 to 30 in Table 10 ........................................................................................................... 99
Figure 25: Y Shaping Filter Selection from No. 31 in Table 10 ................................................................................................................... 100
Figure 26: C Shaping Filter Flowchart ............................................................................................................................................................ 104
Figure 27: C Shaping Filter Selection No. 0 to 3 in Table 11 ....................................................................................................................... 106
Figure 28: C Shaping Filter Selection No. 4 to 13 in Table 11 ..................................................................................................................... 107
Figure 29: C Shaping Filter No. 14 to 18 in Table 11 ................................................................................................................................... 107
Figure 30: Split Filter Frequency Response .................................................................................................................................................... 108
Figure 31: IF Compensation Filter Responses 0 to 3 .................................................................................................................................... 109
Figure 32: IF Compensation Filter Responses 4 to 9 .................................................................................................................................... 109
Figure 33: LTI/CTI Operation Diagram ........................................................................................................................................................ 110
Figure 34: SECAM Signal Distortion .............................................................................................................................................................. 111
Figure 35: LTI Filter Response 0 ..................................................................................................................................................................... 111
Figure 36: LTI Filter Response 1 ..................................................................................................................................................................... 112
Figure 37: CTI Filter Response 0 ..................................................................................................................................................................... 113
Figure 38: CTI Filter Response 1 ..................................................................................................................................................................... 113
Figure 39: Peaking Block Diagram .................................................................................................................................................................. 115
Figure 40: Core Threshold in Horizontal Peaking ....................................................................................................................................... 116
Figure 41: Horizontal Peaking High-Pass Filter ........................................................................................................................................... 117
Figure 42: Horizontal Peaking Band-Pass Filter 1 ........................................................................................................................................ 117
Figure 43: Horizontal Peaking Band-Pass Filter 2 ........................................................................................................................................ 118
Figure 44: Peaking Controls ............................................................................................................................................................................. 119
Figure 45: Vertical Peaking Filter .................................................................................................................................................................... 120
Figure 46: Frame Synchronization Block Diagram ...................................................................................................................................... 121
Figure 47: HSync and VSync Timing Controls ............................................................................................................................................. 126
Figure 48: DE Timing Controls ....................................................................................................................................................................... 131
Figure 49: Single CSC Channel ........................................................................................................................................................................ 132
Rev. A May 2012 450