Csync Signal Configuration; Figure 48: De Timing Controls - Analog Devices ADV7850 Hardware Manual

sdp_de_h_end_adj[11:0] allows the user to adjust the horizontal DE trailing edge position relative to the HSync. The values are measured
in pixel units from the falling edge of HSync.
The position of the horizontal DE trailing edge is controlled by placing a twos complement number into the
The number is a twos complement value that allows both positive and negative edge movement.
sdp_de_h_end_adj[11:0], Addr 94 (sdp_IO), Address 0x9A[3:0]; Address 0x9B[7:0]
Adjust SDP DE horizontal end position versus default, 2s complement.
Function
sdp_de_h_end_adj[11:0
]
0x000 <<

CSync Signal Configuration

6.18.4
The sdp_cs_pol control allows the user to configure the polarity of the CSync signal on the output pin.
sdp_cs_pol, Addr 94 (sdp_IO), Address 0xB1[3]
A control to change polarity of HS/CS.
Function
sdp_cs_pol
0
1 <<
Rev. A May 2012
Description
Default value

Figure 48: DE Timing Controls

Description
Inverted HS/CS polarity
Default HS/CS polarity
Active Video
Odd Field
Active Video
Even Field
131
ADV7850
sdp_de_h_end_adj[11:0] bits.