Spi Vdp Controls And Readbacks - Analog Devices ADV7850 Hardware Manual

Function
vdp_data_packet_size[
5:0]
111111 
chip_select_polarity, IO, Address 0xE4[2]
A control to decide polarity of the chip select for SPI during slave configuration.
Function
chip_select_polarity
0 <<
1
clock_polarity, IO, Address 0xE4[1]
A control to adjust the clock polarity for the SPI Interface(CPOL).
Function
clock_polarity
0 <<
1
clock_phase, IO, Address 0xE4[0]
A control to adjust the clock phase control for SPI.
Function
clock_phase
0 <<
1

SPI VDP Controls and Readbacks

10.7.4
vdp_fast_vbi_std[3:0], Addr 48 (VDP), Address 0xC2[3:0] (Read Only)
This readback displays the VBI standard in the SPI registers.
Rev. A May 2012
Description
default value
Description
Active low
Active high
Description
Normal polarity
Inverted polarity
Description
Data is captured on the rising edge of the SPI clock
Data is captured on falling edge of the SPI clock
328
ADV7850