Analog Devices ADV7850 Hardware Manual page 348

• Data bus signals – DDR_DQ31 to DDR_DQ0
•
Data strobe signals – DDR_DQS3_DDR_DQS3B to DDR_DQS0 DDR_DQS0B
The DDR2 reference voltage (DDR_VREF) should be routed as far away as possible from other the signals to avoid any variations in the
voltage. This trace should be wide. There should be a 100 nF decoupling cap close to the DDR2 reference voltage pins as well as the
ADV7850 reference pin.
Rev. A May 2012 348
ADV7850