Edid Support In Power-Off Mode - Analog Devices ADV7850 Hardware Manual

• In power-down mode 0, all the sections of the ADV7850 are disabled except for the following blocks:
I C slave section
2

E-EDID/Repeater controller

E-EDID ring oscillator

The ring oscillator provides a clock to the E-EDID/Repeater controller (refer to Section 7.4) and the +5 V power supply
antiglitch filter. The clock output from the ring oscillator runs approximately at 50 MHz.
The following are the only pads enabled in power-down mode:
• I C pads:
2
SDA

SCL

• +5 V pads:
RXA_5V

RXB_5V

RXC_5V

RXD_5V

HPA_A

HPA_B

HPA_C

HPA_D

•
DDC pads:
DDCA_SCL

DDCA_SDA

DDCB_SCL

DDCB_SDA

DDCC_SCL

DDCC_SDA

DDCD_SCL

DDCD_SDA

• SPI EEPROM interface pads:
EP_MOSI

EP_MISO

 EP_CS
EP_SCK

•
Reset pad :
 RESET
Entering Power-down Mode
The ADV7850 can be put into power-down mode 0 via the software as follows:
• Set power_down
• Set tx_power_down
Leaving Power-down Mode 0 via Software
The ADV7850 can be removed from power-down mode via the software as follows:
• Set power_down
• Set tx_power_down

EDID Support in Power-off Mode

3.2.4
The ADV7850 fully supports EDID read functionality in a powered off configuration. The 5V signal from the HDMI or graphic cable can
be used to power the EDID controller on the ADV7850. Onboard regulators will provide a 3.3V signal to power the SPI EEPROM.
The following configuration can be used to provide EDID functionality when in a powered off state. If this feature is not used on the
ADV7850 the VDD_EEPROM pin must be decoupled through a 100nF capacitor to ground.
Rev. A May 2012
to 1
to 1
to 0
to 0
31
ADV7850