Block 3 Checksum
0x1FF
0x180
Block 2 Checksum
0x17F
0x100
0xFF
Block 1 Checksum
0x80
Block 0 Checksum
0x7F
0x00
The SPA of Port B is programmed in the
This register should contain a value greater than 0x7F since the SPA is located in an upper block of the E-EDID.
Notes:
•
When internal E-EDID is required for Port B, the SPA along with its location address in the E-EDID must be programmed in the
Repeater Map, registers spa_port_b[15:0]and
•
After
man_edid_b_enable
image for Port B. The E-EDID controller then updates the checksum registers in the E-EDID RAM memory location, as shown
in
Figure
53.
•
After power up, the ADV7850 E-EDID controller sets all bytes in the internal E-EDID RAM to 0. This operation takes less than
1 ms. It is recommended to wait for at least 1 ms before initializing the EDID Map with E-EDID.
•
spa_location[7:0]
5.
•
When internal E-EDID is enabled on Port B, the Hot Plug should not be asserted until the EDID Map has been completely
initialized with E-EDID.
•
The internal E-EDID can be accessed in read-only mode through the DDC interface at the I
•
The internal E-EDID can be accessed in read/write mode through the general I
•
spa_port_b[15:0]
read from the location
support for non CEA-861 compliant E-EDIDs, for example, VESA-only compliant E-EDID for analog inputs.
The SPA of Port B is the address of the Port B in the CEC interface. The SPA is comprised of four components, A, B, C, and D as defined
in the HDMI specification, and are programmed as follows:
•
spa_port_b[15:12] = A
•
spa_port_b[11:8] = B
•
spa_port_b[7:4] = C
Rev. A May 2012
0x1FE
0x17E
0xFE
0x7E
Figure 53: Port B E-EDID Structure and Mapping for SPA Located in E-EDID Block 1
spa_port_b[15:0]
is set to 1, the ADV7850 E-EDID/Repeater controller computes the six checksums of the E-EDID
must be programmed with a value greater than 0x7F as SPA is always located in the E-EDID blocks 1, 2, 3, 4 or
does not have to be programmed with an actual SPA value. It can be programmed with any value that must be
spa_location[7:0]
when the internal E-EDID is accessed from the DDC lines of Port B. This allows
0x1FF
0x100
Port_B_Checksum[7:0]
0xFF
SPA_PORT_B[15:0]
0x80
0x00
register. The SPA location is programmed in the
spa_location[7:0]
respectively.
148
}
Internal Ram
Repeater Map Reg 0x7A
0xFE
Internal Ram
Repeater Map Reg 0x70,Reg 0x71
}
0x7F
Internal Ram
spa_location[7:0]
C address 0xA0.
2
C interface at the EDID Map I
2
ADV7850
register.
C address.
2
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