Figure 70: Dsd Timing Diagram; Table 20: Audio Mapping For Dsd_Map_Rot = 00, Dsd_Map_Inv = 0 (Default); Table 21: Audio Mapping For Dsd_Map_Rot = 00, Dsd_Map_Inv = 1 - Analog Devices ADV7850 Hardware Manual

Function
dsd_map_inv
0 
1
dsd_map_rot and dsd_map_inv are independent controls. Any combination of values is, therefore, allowed for dsd_map_rot and
dsd_map_inv. Table 20 and
Notes:
DSD0A and DSD0B output must be used when in stereo mode only. DSD0A and DSD0B always carry the main 2-channel audio data.
DSD1A, DSD1B, DSD2A, and DSD2B are the surround channels.
Where xx is the channel, for example, 0A, 0B
1
By default, the ADV7850 automatically enables the DSD interface if it receives DSD packets. The ADV7850 also automatically enables the
I2S interface if it receives audio sample packets or if it does not receive any audio packets. However, it is possible to override the audio
interface that is used via the
ovr_auto_mux_dsd_out, Addr 68 (HDMI), Address 0x01[3]
This control is used to override the DSD/DST output control. In automatic control, DSD or I2S interface is selected according to the
type of packet received. The DSD/DST interface is enabled if the part receives DSD or DST audio sample packet. The I2S interface is
enabled when the part receives audio sample packets or when no packet is received. In manual mode, mux_dsd_out selects the output
interface.
Function
ovr_auto_mux_dsd_out
0 
1
mux_dsd_out, Addr 68 (HDMI), Address 0x01[4]
This control is used to set the override for the DSD output.
Rev. A May 2012
Description
Do not invert arrangement of DSD channels on audio output port pins
Invert arrangement of DSD channels on audio output port pins
Table 21 show examples of mappings for the DSD signals.

Table 20: Audio Mapping for dsd_map_rot = 00, dsd_map_inv = 0 (Default)

Output Pixel Port Name
HA_AP0
HA_AP1
HA_AP2
HA_AP3
HA_AP4
HA_AP5

Table 21: Audio Mapping for dsd_map_rot = 00, dsd_map_inv = 1

Output Pixel Port Name
HA_AP0
HA_AP1
HA_AP2
HA_AP3
HA_AP4
HA_AP5
SCLK
DSDxx
ovr_auto_mux_dsd_out and
Description
Automatic DSD/DST output control
Override DSD/DST output control
DSD Interface
DSD0A
DSD0B
DSD1A
DSD1B
DSD2A
DSD2B
DSD Interface
DSD2B
DSD2A
DSD1B
DSD1A
DSD0B
DSD0A

Figure 70: DSD Timing Diagram

mux_dsd_out controls.
188
1
ADV7850