Analog Devices ADV7850 Hardware Manual page 128

Function
sdp_vsf_h_mid_adj[11:
0]
0x000 <<
sdp_vs_v_beg_o_adj[5:0], Addr 94 (sdp_IO), Address 0xA8[5:0]
Adjust SDP VSync pin begin line relative to default, only +ve recommended, twos complement.
Function
sdp_vs_v_beg_o_adj[5:
0]
000100 <<
sdp_vs_v_beg_e_adj[5:0], Addr 94 (sdp_IO), Address 0xA9[5:0]
Adjust SDP VSync pin begin line relative to default, only +ve recommended, 2s complement.
Function
sdp_vs_v_beg_e_adj[5:
0]
000100 <<
sdp_vs_v_end_o_adj[5:0], Addr 94 (sdp_IO), Address 0xAA[5:0]
Adjust SDP VSync pin end line relative to default, only +ve recommended, 2s complement.
Function
sdp_vs_v_end_o_adj[5:
0]
000100 <<
sdp_vs_v_end_e_adj[5:0], Addr 94 (sdp_IO), Address 0xAB[5:0]
Adjust SDP VSync pin end line relative to default, only +ve recommended, 2s complement.
Function
sdp_vs_v_end_e_adj[5:
0]
000100 <<
sdp_fld_tog_o_adj[5:0], Addr 94 (sdp_IO), Address 0xA6[5:0]
Adjust SDP field pin transition relative to default, only +ve recommended, 2s complement.
Function
sdp_fld_tog_o_adj[5:0]
000100 <<
sdp_fld_tog_e_adj[5:0], Addr 94 (sdp_IO), Address 0xA7[5:0]
Adjust SDP field pin transition relative to default, only +ve recommended, 2s complement.
Rev. A May 2012
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128
ADV7850