Analog Devices ADV7850 Hardware Manual page 415

tmdspll_lck_c_st, IO, Address 0x6B[5] (Read Only)
This readback indicates the latched status of the Port C TMDS PLL lock interrupt signal. Once set, this bit remains high until the
interrupt is cleared via tmdspll_lck_c_clr. This bit is only valid if enabled via the corresponding INT1 or INT2 interrupt mask bit.
Function
tmdspll_lck_c_st
0 
1
tmdspll_lck_d_st, IO, Address 0x6B[4] (Read Only)
This readback indicates the latched status of the Port D TMDS PLL lock interrupt signal. Once set, this bit remains high until the
interrupt is cleared via tmdspll_lck_d_clr. This bit is only valid if enabled via the corresponding INT1 or INT2 interrupt mask bit.
Function
tmdspll_lck_d_st
0 
1
tmds_clk_a_st, IO, Address 0x6B[3] (Read Only)
This readback indicates the latched status of the Port A TMDS clock detection interrupt signal. Once set, this bit remains high until the
interrupt is cleared via tmds_clk_a_clr. This bit is only valid if enabled via the corresponding INT1 or INT2 interrupt mask bit.
Function
tmds_clk_a_st
0 
1
tmds_clk_b_st, IO, Address 0x6B[2] (Read Only)
This readback indicates the latched status of the Port B TMDS clock detection interrupt signal .Once set, this bit remains high until the
interrupt is cleared via tmds_clk_b_clr. This bit is only valid if enabled via the corresponding INT1 or INT2 interrupt mask bit.
Function
tmds_clk_b_st
0 
1
tmds_clk_c_st, IO, Address 0x6B[1] (Read Only)
This readback indicates the latched status of the Port C TMDS clock detection interrupt signal. Once set, this bit remains high until the
interrupt is cleared via tmds_clk_c_clr. This bit is only valid if enabled via the corresponding INT1 or INT2 interrupt mask bit.
Function
tmds_clk_c_st
0 
1
tmds_clk_d_st, IO, Address 0x6B[0] (Read Only)
This readback indicates the latched status of the Port D TMDS clock detection interrupt signal. Once set, this bit remains high until the
interrupt is cleared via tmds_clk_d_clr. This bit is only valid if enabled via the corresponding INT1 or INT2 interrupt mask bit.
Rev. A May 2012
Description
tmdspll_lck_c_raw not changed, interrupt not generated
tmdspll_lck_c_raw changed, interrupt generated
Description
tmdspll_lck_d_raw not changed, interrupt not generated
tmdspll_lck_d_raw changed, interrupt generated
Description
tmds_clk_a_raw not changed, interrupt not generated
tmds_clk_a_raw changed, interrupt generated
Description
tmds_clk_b_raw not changed, interrupt not generated
tmds_clk_b_raw changed, interrupt generated
Description
tmds_clk_c_raw not changed, interrupt not generated
tmds_clk_c_raw changed, interrupt generated
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ADV7850