9 COMPONENT PROCESSOR
C o m p o n e n t
P r o cess o r
S y n c P r o cess in g
C h a n n e l 1
S y n c P r o cess in g
C h a n n e l 2
Vid e o Da ta
C H A , C H B and
C H C In p u t
9.1 INTRODUCTION TO COMPONENT PROCESSOR
A simplified block diagram of the CP on the ADV7850 is shown in
(DPP). The CP circuitry is activated under the control of
The CP is activated for the following modes of operation:
•
GR modes: PC graphic-based signals in RGB format
•
HD modes: high definition video signals in YPbPr/RGB format
•
PR mode: progressive scan video signals in YPbPr/RGB format, for example, 525p and 625p
•
SD modes: component standard definition in YPbPr/RGB format, for example, 525i and 625i
The CP performs the following functions:
•
Digital fine clamping of the video signal
•
Manual and automatic gain control
•
Manual offset correction
•
Saturation
The CP has the following capabilities:
•
Generates HSync, VSync, FIELD, and Data Enable (DE) timing reference for the HDMI Tx section
•
Detects the source from which the video is to be synchronized
•
Measures noise and calibration levels
•
Measures the depth of the horizontal synchronization pulse used for AGC
•
Detects the presence of Macrovision encoded signals
•
Color space conversion
•
Color control adjustment
Rev. A May 2012
S y n c S o u rc e a n d
P o la rity
D e te ctio n
(S S PD )
S y n c S o u rc e a n d
P o la rity
D e te ctio n
(S S PD )
M V & C G M S
De te ctio n
Dig ita l
De la y
Fin e
Cla m p
Figure 78: Component Processor Block Diagram
S ta n d a rd
Id e n tific atio n
(S T D I)
S ta n d a rd
Id e n tific atio n
(S T D I)
No is e and
Ca lib ra tio n
Ga in
Offs et
Co n tro l
Ad d e r
Ac tiv e Pe a k and
H S y n c De p th
Figure
78. Data is supplied to the CP from the Data Preprocessor
prim_mode[3:0]
and vid_std[5:0].
241
S y n c E x tra cto r
C P C S C
ADV7850
H S /V S /F
Ou tp ut to
HDMI Tx Section
Vid eo Data
C H A , C H B and
C H C Ou tp ut to
HDMI Tx Section
Meas u rem en t
Blo ck (= > I2C )
Vid eo Data
Pro cess in g
Blo ck
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