Table 41: Hdmi Flags In Io Map Register 0X79; Table 42: Hdmi Flags In Io Map Register 0X7E; Table 43: Hdmi Flags In Io Map Register 0X83 - Analog Devices ADV7850 Hardware Manual

Bit Name
new_gamut_mdata_raw
audio_pckt_err_raw
packet_error_raw
change_n_raw
cts_pass_thrsh_raw
fifo_overflo_raw
fifo_underflo_raw
fifo_near_ovfl_raw
Bit Name Bit
Position
fifo_near_uflo_raw 0 (LSB)
new_tmds_frq_raw 1
audio_flt_line_raw 2
new_samp_rt_raw 3
parity_error_raw 4
audio_mode_chng_raw 5
vclk_chng_raw 6
deep_color_chng_raw 7 (MSB)
Rev. A May 2012

Table 41: HDMI Flags in IO Map Register 0x79

Bit Name
new_avi_info_raw
new_audio_info_raw
new_spd_info_raw
new_ms_info_raw
new_vs_info_raw
new_acp_pckt_raw
new_isrc1_pckt_raw
new_isrc2_pckt_raw

Table 42: HDMI Flags in IO Map Register 0x7E

Bit Description
Position
0 (LSB) When set to 1, indicates that Gamut Metadata packet with new content received. Once set, remains
high until interrupt cleared via new_gamut_mdata_pckt_clr (IO Map 0x80 [0]).
1 When set to 1, indicates that an uncorrectable error detected in body of an audio packet. Once set,
remains high until interrupt cleared via audio_pckt_err_clr (IO Map 0x80 [1]).
2 When set to 1, indicates an uncorrectable EEC error detected in body or header of any packet. Once
set, remains high until interrupt cleared via packet_error_clr (IO Map 0x80 [2]).
3 When set to 1, indicates the N value of the ACR packets changed. Once set, remains high until
interrupt cleared via change_n_clr (IO Map 0x80 [3]).
4 When set to 1, indicates the CTS value of the ACR packets exceeded threshold set by
cts_change_threshold. Once set, remains high until interrupt cleared via cts_pass_thrsh_clr (IO Map
0x80 [4]).
5 When set to 1, indicates the audio FIFO write pointer reached the read pointer causing audio FIFO
to overflow. Once set, remains high until interrupt cleared via fifo_overflo_clr (IO Map 0x80 [5]).
6 When set to 1, indicates the audio FIFO read pointer reached the write pointer causing audio FIFO
to underflow. Once set, remains high until interrupt cleared via fifo_underflo_clr (IO Map 0x80 [6]).
7 (MSB) When set to 1, indicates the audio FIFO is near overflow as the number of FIFO registers containing
stereo data is greater or equal to value set in audio_fifo_almost_full_threshold. Once set, remains
high until interrupt cleared via fifo_near_ovfl_clr (IO Map 0x80 [7]).

Table 43: HDMI Flags in IO Map Register 0x83

Description
When set to 1, indicates audio FIFO is near underflow as the number of FIFO registers containing
stereo data is less or equal to value set in audio_fifo_almost_empty_threshold. Once set, remains
high until interrupt cleared via fifo_near_uflo_clr (IO Map 0x85 [0]).
When set to 1, indicates the TMDS Frequency has changed by more than the tolerance set in
freqtolerance[3:0]. Once set, remains high until interrupt cleared via new_tmds_freq_clr (IO Map
0x85 [1]).
When set to 1, indicates audio sample packet received with Flat line bit set to 1. Once set, remains
high until interrupt cleared via audio_flt_line_clr (IO Map 0x85 [2]).
When set to 1, indicates that audio sampling frequency field in channel status data has changed.
Once set, remains high until interrupt cleared via new_samp_rt_clr (IO Map 0x85 [3]).
When set to 1, indicates an audio sample packet received with parity error. Once set, remains high
until interrupt cleared via parity_error_clr (IO Map 0x85 [4]).
When set to 1, indicates the type of audio packet received has changed. The following are
considered audio modes: No Audio, PCM, DSD, DST or HBR. audio_sample_pckt_det,
dsd_packet_det, dst_packet_det and hbr_audio_pckt_det used to identify type of audio packet
currently received. Once set, remains high until the interrupt cleared via audio_mode_chng_clr (IO
Map 0x85 [5]).
When set to 1, indicates that irregular or missing pulses are detected in the TMDS clock. Once set,
remains high until interrupt cleared via vclk_chng_clr (IO Map 0x85 [6]).
When set to 1, indicates a change in the deep color mode detected. Once set, remains high until
interrupt has been cleared via deep_color_chng_clr (IO Map 0x85 [7]).
Bit Position
0 (LSB)
1
2
3
4
5
6
7 (MSB)
224
ADV7850