The audio output interface can be adjusted into numerous configurations for the different audio formats. This flexibility helps to increase
interconnectivity with downstream audio devices and HDMI transmitters.
possible output interfaces.
Note: It is possible to tristate the audio pins using the global controls, as described in Section 3.
I2S/SPDIF Audio Interface and Output Controls
7.28.1
Two controls are provided to change the mapping between the audio output ports and the I2S and SPDIF signals.
i2s_spdif_map_rot[1:0], Addr 68 (HDMI), Address 0x6D[5:4]
This control is used to select the arrangement of the I2S/SPDIF interface on the audio output port pins.
Function
i2s_spdif_map_rot[1:0]
00
01
10
i2s_spdif_map_inv, Addr 68 (HDMI), Address 0x6D[6]
This control is used to invert the arrangement of the I2S/SPDIF interface on the audio output port pins. Note the arrangement of the
I2S/SPDIF interface on the audio output port pins is determined by i2s_spdif_map_rot.
Function
i2s_spdif_map_inv
0
1
i2s_spdif_map_rot and i2s_spdif_map_inv are independent controls. Any combination of values is therefore allowed for
i2s_spdif_map_rot and i2s_spdif_map_inv.
Rev. A May 2012
Table 15: Default Audio Output Pixel Port Mapping
Output Pixel Port
I2S/SPDIF Interface
HA_AP0
SPDIF0
HA_AP1
I2S0/SDPIF0
HA_AP2
I2S1/SDPIF1
HA_AP3
I2S2/SPDIF2
HA_AP4
I2S3/SPDIF3
HA_AP5
LRCLK
Description
[I2S0/SPDIF0 on AP1] [I2S1/SPDIF1 on AP2] [I2S2/SPDIF2 on AP3] [I2S3/SPDIF3 on AP4]
[I2S3/SPDIF3 on AP1] [I2S0/SPDIF0 on AP2] [I2S1/SPDIF1 on AP3] [I2S2/SPDIF2 on AP4]
[I2S2/SPDIF2 on AP1] [I2S3/SPDIF3 on AP2] [I2S0/SPDIF0 on AP3] [I2S1/SPD
Description
Do not invert arrangement of I2S/SPDIF channels in audio output port pins
Invert arrangement of I2S/SPDIF channels in audio output port pins
Table 16
and
Table 17
Table 16: Audio Mappings for i2s_spdif_map_rot = 00, i2s_spdif_map_inv = 0 (Default)
Output Pixel Port
HA_AP1
HA_AP2
HA_AP3
HA_AP4
Table 17: Audio Mappings for i2s_spdif_map_rot = 00, i2s_spdif_map_inv = 1
Output Pixel Port
HA_AP1
HA_AP2
HA_AP3
HA_AP4
Table 15
shows the default configurations for the various
DSD Interface
DSD0A
DSD0B
DSD1A
DSD1B
DSD2A
DSD2B
show examples of mappings for the I2S/SPDIF signals.
I2S/SPDIF Interface
I2S0/SDPIF0
I2S1/SDPIF1
I2S2/SDPIF2
I2S3/SDPIF3
I2S/SPDIF Interface
I2S3/SDPIF3
I2S2/SDPIF2
I2S1/SDPIF1
I2S0/SDPIF0
184
DST
DST_S
DST_FF
ADV7850
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