Clock And Data Termination Control - Analog Devices ADV7850 Hardware Manual

Function
tmds_clk_a_raw
0 
1
tmds_clk_b_raw, IO, Address 0x6A[2] (Read Only)
This readback indicates the raw status of the Port B TMDS clock detection signal.
Function
tmds_clk_b_raw
0 
1
tmds_clk_c_raw, IO, Address 0x6A[1] (Read Only)
This readback indicates the raw status of the Port C TMDS clock detection signal.
Function
tmds_clk_c_raw
0 
1
tmds_clk_d_raw, IO, Address 0x6A[0] (Read Only)
This readback indicates the raw status of the Port D TMDS clock detection signal.
Function
tmds_clk_d_raw
0 
1
Important:
• The clock detection flags are valid for a specific port as long as the TMDS clock and data termination have been enabled for that
port.
• The clock detection flags are valid if the CP and HDMI cores have been powered down
•
The clock detection flags are valid, irrespective of the mode the part is set into via the prim_mode[3:0] register.

Clock and Data Termination Control

7.16.1
The ADV7850 provides controls for the TMDS clock and data termination on all HDMI ports. The ADV7850 also offers automatic or
manual termination closure of the selected port, and individual manual control over the four ports.
Note: The clock termination of the port selected by
term_auto, Addr 68 (HDMI), Address 0x01[0]
This control is used to select automatic or manual control of clock termination. If automatic mode termination is enabled, then the
termination on the port selected via hdmi_port_select[1:0] is enabled. The termination is disabled on all other ports.
Function
term_auto
0 
1
Rev. A May 2012
Description
No TMDS clock detected on Port A
TMDS clock detected on Port A
Description
No TMDS clock detected on Port B
TMDS clock detected on Port B
Description
No TMDS clock detected on Port C
TMDS clock detected on Port C
Description
No TMDS clock detected on Port D
TMDS clock detected on Port D
hdmi_port_select[2:0]
Description
Disable termination automatic control
Enable termination automatic control
must always be enabled.
154
ADV7850