Spi Eeprom Data Structure; Figure 51: Spi Eeprom Data Image Structure - Analog Devices ADV7850 Hardware Manual

Function
store_edid
0 
1
The ADV7850 uses first 8 bits of EDID for its own purpose to load and store from the EEPROM. The register below lists the contents of
the first 8 bits and their use. The customer should program to their system requirements
spi_cfg[5:0], Addr 64 (Repeater), Address 0x7C[5:0]
This control is used to set the SPI configuration values from the SPI EEPROM byte 0 in an EDID_LOAD operation, or to be written to
the same byte during an EDID_STORE operation.
Function
spi_cfg[5:0]
Bit5
Bit4
Bit2
Bits[1:0]

SPI EEPROM Data Structure

7.8.1
The ADV7850 requires data in the SPI EEPROM to be stored as shown in
The SPA location is stored in lieu of the checksums – the part recalculates the checksums once the E-EDID data has been read.
Notes:
• 4 Kb SPI EEPROM must be used to store a 3 to 4 block E-EDID image
• 2 Kb or 4 Kb SPI EEPROM can be used to store a 2 block E-EDID image
• Although the SPA location is duplicated in both segments of the SPI EEPROM structure, the E-EDID controller uses only the
SPA location that is in the first segment of the SPI EEPROM
Rev. A May 2012
Description
No effect
Write contents of internal E-EDID to SPI EEPROM
Description
SPA_Double_Byte
VGA_EDID_present
Assert HPA in power off mode
Number of 256byte blocks present in EDID
SPA Location[7:0]
0x1FF
0x180
{Reserved [6:0], SPA Location[8]}
0x17F
0x100
SPA Location[7:0]
0xFF
0x80
{Reserved [6:0], SPA Location[8]}
0x7F
0x00

Figure 51: SPI EEPROM Data Image Structure

Figure 51.
0x1FE
Block 3
Segment 1
0x17E
Block 2
Segment 1
0xFE
Block 1
Segment 0
0x7E
Block 0
Segment 0
146
ADV7850