Clamp Operation; Sdp Clamp Operation; Figure 6: Video Input Signal Level Prior To 24 Ohm To 51 Ohm Resistor Divider; Figure 7: Video Input Signal Level After Voltage Clamps - Analog Devices ADV7850 Hardware Manual

Clamp Operation

5.2.2
The ADV7850 has a clamp in front of each of its ADCs. The purpose of the clamp is to ensure that the video input signal lies inside the
range of the ADC. In component and graphics modes, voltage clamps are used; and in standard definition modes, current clamps are
used. Clamping is done automatically and does not require user programming. Optimum performance is selected by default.
shows the resistor divider network required on each analog input to scale the input video to the input range of the ADCs.
730mV

SDP Clamp Operation

5.2.3
Standard definition video signals can have excessive noise on them; especially CVBS signals transmitted by terrestrial broadcast and
demodulated using a tuner. These usually show very large levels of noise. A voltage clamp would be unsuitable for this type of video
signal. Instead, the ADV7850 employs a set of current sources that can cause currents to flow into and away from the high impedance
node that carries the video signal (refer to
Since the input video is AC coupled into the ADV7850, its DC value needs to be restored. This process is referred to as clamping the
video. This section explains the general process of clamping on the ADV7850 for the SDP and shows the different ways in which a user
can configure its behavior.
The SDP block uses a combination of current sources and a digital processing block for clamping, as shown in
Rev. A May 2012
Y Input Signal Range
1.6V
~1V

Figure 6: Video Input Signal Level Prior to 24 Ohm to 51 Ohm Resistor Divider

Y Signal Range
1.345 V
~0.5V
{
830mV
0.615 V

Figure 7: Video Input Signal Level After Voltage Clamps

Figure 8).
Pr/Pb Input Signal Range
Clamp
730mV
Level
43
1.6V
~1V
Pr/Pb Signal Range
1.345 V
~0.5V
{
980mV
0.615 V
ADV7850
Figure 5
Clamp
Level
Figure 8.